The Phase Locked Loop Exam Study Material for Gate ECE

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Analog IC Design (View More...)

Nyquist Criterion; Phase Margin	lec10	37:20 to 44:38	PDF	VIDEO
Phase Margin	lec11	10:30 to 16:50	PDF	VIDEO
Phase Margin	lec11	33:55 to 47:54	PDF	VIDEO
Loop Gain and Unity Loop Gain Frequency: Opamp	lec4	19:04 to 22:01	PDF	VIDEO
Loop Gain and Unity Loop Gain Frequency: Opamp	lec4	22:01 to 26:38	PDF	VIDEO
Loop Gain and Unity Loop Gain Frequency: Opamp	lec4	26:38 to 31:56	PDF	VIDEO
Loop Gain and Unity Loop Gain Frequency: Opamp	lec4	31:56 to 36:12	PDF	VIDEO
Loop Gain and Unity Loop Gain Frequency: Opamp	lec4	36:12 to 38:26	PDF	VIDEO
Type I PLL Loop Gain and Transfer Function Reference feed Through	lec47	06:58 to 09:38	PDF	VIDEO
Opamp Realization using Controlled Sources; Delay in the Loop	lec5	06:02 to 09:20	PDF	VIDEO

Communication Engineering (View More...)

The Phase Locked Loop	lec23	01:08 to 04:45	PDF	VIDEO
The Phase Locked Loop	lec23	04:45 to 11:49	PDF	VIDEO
The Phase Locked Loop	lec23	11:49 to 16:03	PDF	VIDEO
The Phase Locked Loop	lec23	16:03 to 22:37	PDF	VIDEO
The Phase Locked Loop	lec23	22:37 to 29:02	PDF	VIDEO
The Phase Locked Loop	lec23	29:02 to 32:24	PDF	VIDEO
The Phase Locked Loop	lec23	32:24 to 39:08	PDF	VIDEO
The Phase Locked Loop	lec23	39:08 to 42:44	PDF	VIDEO
The Phase Locked Loop	lec23	42:44 to 47:45	PDF	VIDEO
The Phase Locked Loop	lec23	47:45 to 53:57	PDF	VIDEO

Control Engineering M Gopal (View More...)

Basic Principles of Feedback Control (Contdâ¦)	lec20	10:24 to 12:50	PDF	VIDEO
Basic Principles of Feedback Control (Contdâ¦)	lec20	33:11 to 35:50	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins	lec35	00:40 to 42:56	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins	lec35	20:25 to 23:47	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins	lec35	42:56 to 46:29	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins	lec35	46:29 to 51:25	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins	lec35	51:25 to 53:58	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins (Contd.)	lec36	36:07 to 39:21	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins (Contd.)	lec36	7:21 to 9:18	PDF	VIDEO
The Nyquist Stability Criterion and Stability Margins (Contd.)	lec37	18:39 to 26:54	PDF	VIDEO

Control Engineering S D Agash (View More...)

lec15	lec15	01:01 to upto	PDF	VIDEO
lec15	lec15	20:57 to 27:46	PDF	VIDEO
lec15	lec15	35:37 to 43:58	PDF	VIDEO
lec15	lec15	55:21 to 58:03	PDF	VIDEO
lec15	lec15	58:03 to 01:01	PDF	VIDEO
lec16	lec16	14:56 to 19:28	PDF	VIDEO
lec16	lec16	34:04 to 39:36	PDF	VIDEO
lec16	lec16	42:34 to 43:30	PDF	VIDEO
lec17	lec17	01:59 to 05:20	PDF	VIDEO
lec28	lec28	41:46 to 42:18	PDF	VIDEO

Electronics for Analog Signal Processing - II (View More...)

PLL (PHASE LOCKED LOOP)	lec37	02:40 to 03:24	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	03:24 to 04:23	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	05:13 to 07:13	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	07:13 to 11:08	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	11:40 to 14:31	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	14:50 to 17:32	PDF	VIDEO
PLL (PHASE LOCKED LOOP)	lec37	23:51 to 28:46	PDF	VIDEO
PLL (Phase Locked Loop) (Continued)	lec38	18:59 to 20:57	PDF	VIDEO
PLL (Phase Locked Loop) (Continued)	lec38	24:15 to 25:08	PDF	VIDEO
PLL (Phase Locked Loop) (Continued)	lec38	40:37 to 42:11	PDF	VIDEO

RF Integrated Circuits (View More...)

Phase Locked Loop Basics	lec31	03:14 to 09:10	PDF	VIDEO
Phase Locked Loop Basics	lec31	12:46 to 17:56	PDF	VIDEO
Phase Locked Loop Basics	lec31	27:25 to 35:40	PDF	VIDEO
Phase Locked Loop Basics	lec31	37:13 to 47:58	PDF	VIDEO
Phase Locked Loop Basics	lec31	47:58 to 53:10	PDF	VIDEO
Phase Locked Loop Basics	lec31	53:10 to upto	PDF	VIDEO
Charge Pump	lec32	43:27 to upto	PDF	VIDEO
Spurious Frequencies (Contd.) Fractional N Synthesis	lec34	13:56 to 23:33	PDF	VIDEO
Fractional Spurs	lec35	11:11 to 18:56	PDF	VIDEO
Course Summary and Conclusion	lec40	12:15 to 34:12	PDF	VIDEO

VLSI Circuits (View More...)

Verilog Modeling of Combinational Circuits	lec10	40:43 to 52:48	PDF	VIDEO
Modeling of Verilog Sequential Circuits - Core Statements	lec11	04:32 to 07:15	PDF	VIDEO
Modeling of Verilog Sequential Circuits - Core Statements	lec11	10:45 to 14:35	PDF	VIDEO
Modeling of Verilog Sequential Circuits - Core Statements	lec11	17:45 to 21:00	PDF	VIDEO
Modeling of Verilog Sequential Circuits - Core Statements	lec11	36:20 to 39:39	PDF	VIDEO
Modeling of Verilog Sequential Circuits - Core Statements	lec11	43:04 to 45:08	PDF	VIDEO
Modelling of Verilog Sequential Circuits Core Statements (Continued)	lec12	08:21 to 10:41	PDF	VIDEO
Modelling of Verilog Sequential Circuits Core Statements (Continued)	lec12	13:05 to 15:20	PDF	VIDEO
Modelling of Verilog Sequential Circuits Core Statements (Continued)	lec12	24:32 to 26:24	PDF	VIDEO
Modelling of Verilog Sequential Circuits Core Statements (Continued)	lec12	39:53 to 52:10	PDF	VIDEO

VLSI Data Conversion Circuits (View More...)

Excess Loop Delay (ELD)	lec32	00:37 to 06:21	PDF	VIDEO
Excess Loop Delay (ELD)	lec32	06:21 to 12:15	PDF	VIDEO
Excess Loop Delay (ELD)	lec32	12:15 to 15:21	PDF	VIDEO
Excess Loop Delay (ELD)	lec32	15:21 to 20:15	PDF	VIDEO
Effect of Clock Jitter on CTDSMs 2	lec35	07:40 to 18:10	PDF	VIDEO
Flash ADC in a Delta Sigma Loop	lec49	05:29 to 09:14	PDF	VIDEO
Flash ADC in a Delta Sigma Loop	lec49	09:14 to 18:50	PDF	VIDEO

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