Control Engineering S D Agash (View More...)
| lec1 | lec1 | 01:00 to 01:00 | VIDEO | |
| lec1 | lec1 | 59:50 to 01:00 | VIDEO | |
| lec2 | lec2 | 45:05 to 47:30 | VIDEO |
Digital Circuits and Systems (View More...)
| J-K and T Flip Flops | lec18 | 19:00 to 26:05 | VIDEO | |
| J-K and T Flip Flops | lec18 | 26:05 to 28:29 | VIDEO | |
| J-K and T Flip Flops | lec18 | 31:40 to 41:53 | VIDEO |
VLSI Circuits (View More...)
| System Design Examples using FPGA Board (Continued) | lec51 | 03:44 to 05:44 | VIDEO | |
| System Design Examples using FPGA Board (Continued) | lec51 | 13:25 to 16:54 | VIDEO | |
| System Design Examples using FPGA Board (Continued) | lec51 | 16:54 to 17:25 | VIDEO |
VLSI Data Conversion Circuits (View More...)
| Effect of Clock Jitter on CTDSMs - 1 | lec34 | 03:45 to 13:50 | VIDEO | |
| Effect of Clock Jitter on CTDSMs - 1 | lec34 | 17:47 to 22:17 | VIDEO | |
| Effect of Clock Jitter on CTDSMs - 1 | lec34 | 22:17 to 30:15 | VIDEO |