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Electronics-and-communication-engineering0
Digital Circuits and Systems (View More...)
| Up/Down Counters | lec20 | 44:15 to 49:09 | VIDEO | |
| Shift Registers | lec21 | 42:30 to 44:27 | VIDEO | |
| Application of Shift Registers | lec22 | 26:10 to 29:40 | VIDEO |
Digital Computer Organization (View More...)
| Pipeline CPU 1 | lec10 | 00:19 to 00:27 | VIDEO | |
| Pipeline CPU 1 | lec10 | 00:27 to 00:32 | VIDEO | |
| Pipeline CPU 1 | lec10 | 00:36 to 00:39 | VIDEO |
Digital System Design (View More...)
| Design of Registers and Counters | lec23 | 15:04 to 17:52 | VIDEO | |
| Design of Registers and Counters | lec23 | 17:52 to 19:56 | VIDEO | |
| Design of Registers and Counters | lec23 | 19:56 to 22:48 | VIDEO |
VLSI Circuits (View More...)
| Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 08:21 to 10:41 | VIDEO | |
| Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 10:41 to 13:05 | VIDEO | |
| Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 15:20 to 19:48 | VIDEO |