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Electronics-and-communication-engineering0
Coding Theory (View More...)
Union Bound, Introduction to LDPC Codes | lec22 | 01:01 to 01:08 | VIDEO | |
LDPC Codes | lec23 | 15:26 to 21:39 | VIDEO | |
Message Passing, Density Evolution Analysis | lec24 | 15:40 to 36:16 | VIDEO |
Control Engineering S D Agash (View More...)
lec1 | lec1 | 23:43 to 26:42 | VIDEO | |
lec10 | lec10 | 36:53 to 50:10 | VIDEO | |
lec12 | lec12 | 24:39 to 43:11 | VIDEO |
Digital Circuits and Systems (View More...)
J-K and T Flip Flops | lec18 | 19:00 to 26:05 | VIDEO | |
J-K and T Flip Flops | lec18 | 26:05 to 28:29 | VIDEO | |
J-K and T Flip Flops | lec18 | 31:40 to 41:53 | VIDEO |
Digital Image Processing (View More...)
Image Enhancement (Point Processing - I) | lec17 | 24:18 to 26:32 | VIDEO | |
Image Enhancement (Point Processing - I) | lec17 | 29:23 to 33:45 | VIDEO | |
Image Enhancement (Point Processing - I) | lec17 | 33:45 to 36:24 | VIDEO |
RF Integrated Circuits (View More...)
Multiplier Fundamentals | lec25 | 30:24 to 44:27 | VIDEO | |
Mixer Non-Idealities | lec26 | 12:41 to 20:58 | VIDEO | |
Mixer Non-Idealities | lec26 | 25:46 to 40:03 | VIDEO |
VLSI Circuits (View More...)
Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 04:09 to 06:46 | VIDEO | |
Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 08:21 to 10:41 | VIDEO | |
Modelling of Verilog Sequential Circuits Core Statements (Continued) | lec12 | 10:41 to 13:05 | VIDEO |
Pattern Recognition (View More...)
Overview of Statistical Learning Theory; Empirical Risk Minimization | lec21 | 13:47 to 16:07 | VIDEO | |
Consistency of Empirical Risk Minimization | lec22 | 01:40 to 05:31 | VIDEO | |
The Bayes Classifier for minimizing Risk | lec3 | 05:04 to 07:57 | VIDEO |
VLSI Data Conversion Circuits (View More...)
Implicit Antialiasing | lec28 | 15:30 to 30:26 | VIDEO | |
Latches and Metastability | lec41 | 38:53 to 50:45 | VIDEO | |
Offset in a Latch 1 | lec42 | 04:27 to 20:01 | VIDEO |