Design Verification and Test of Digital VLSI Circuits (View More...)
| Finite State Machine Synthesis | lec12 | 04:24 to 07:01 | VIDEO | |
| Finite State Machine Synthesis | lec12 | 15:39 to 18:00 | VIDEO | |
| Two level Boolean Logic Synthesis 1 | lec8 | 02:03 to 04:55 | VIDEO |
Electronic Design Automation (View More...)
| Synthesis: Part 5 | lec12 | 01:52 to 04:04 | VIDEO | |
| Synthesis: Part VI | lec13 | 02:19 to 02:50 | VIDEO | |
| Synthesis: Part VI | lec13 | 02:50 to 03:52 | VIDEO |
Low Power VLSI Circuits Systems (View More...)
| Introduction and Course Outline | lec1 | 53:19 to 54:16 | VIDEO | |
| Supply Voltage Scaling II | lec23 | 01:00 to 01:50 | VIDEO | |
| Supply Voltage Scaling III | lec24 | 06:33 to 07:00 | VIDEO |
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