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Computer Science and Engineering VLSI Physical Design

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#	Lecture Name
51	Lecture 53 : Test Pattern Generation
52	Lecture 54: Design for Testability
53	Lecture 55: Boundary Scan Standard
54	Lecture 56: Built'in Self'Test (Part 1)
55	Lecture 57: Built'in Self'Test (Part 2)
56	Lecture 58 : Low Power VLSI Design
57	Lecture 59 : Techniques to Reduce Power
58	Lecture 60 : Gate Level Design for Low Power (Part 1)
59	Lecture 61 : Gate Level Design for Low Power (Part 2)
60	Lecture 62 : Other Low Power Design Techniques

Title:	VLSI Physical Design
Department:	Computer Science and Engineering
Author:	Prof. Indranil Sengupta
University:	IIT Kharagpur
Type:	WebLink
Abstract:	//

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